ICEStick/fizzbuzz/build/blinky.asc
2018-08-17 01:45:31 -07:00

4781 lines
194 KiB
Plaintext

.comment arachne-pnr 0.1+310+0 (git sha1 5d830dd, g++ 8.1.1 -march=x86-64 -mtune=generic -O2 -fstack-protector-strong -fno-plt -O2)
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.sym 5 $abc$760$n1$2
.sym 7 hwclock$2$2
.sym 830 hwclock$2
.sym 836 hwclock$2
.sym 1289 ftdi_tx$2
.sym 2779 $abc$760$n17
.sym 5120 foo.counter[2]
.sym 5121 $false
.sym 5122 $false
.sym 5123 $false
.sym 8775 $abc$760$n69
.sym 8777 foo.counter[6]
.sym 8780 foo.counter[0]
.sym 8781 foo.counter[5]
.sym 8899 $abc$760$n74
.sym 8900 $abc$760$n76
.sym 8901 $abc$760$n78
.sym 8902 $abc$760$n80
.sym 8903 $abc$760$n82
.sym 8904 $abc$760$n84
.sym 9020 $abc$760$n86
.sym 9021 $abc$760$n88
.sym 9022 $abc$760$n90
.sym 9023 $abc$760$n92
.sym 9024 $abc$760$n94
.sym 9025 foo.counter[8]
.sym 9026 foo.counter[4]
.sym 9027 foo.counter[12]
.sym 9147 foo.counter[2]
.sym 9148 foo.counter[10]
.sym 9517 $abc$760$n65
.sym 9636 $abc$760$n81_1
.sym 9639 $abc$760$n96
.sym 9640 ftdi_tx$2
.sym 9641 $abc$760$n80_1
.sym 9642 foo.state[1]
.sym 10883 $abc$760$n68
.sym 10885 foo.counter[1]
.sym 10962 $false
.sym 10963 $false
.sym 10964 foo.counter[0]
.sym 10965 $false
.sym 10974 $abc$760$n74_1
.sym 10975 $abc$760$n82
.sym 10976 $abc$760$n108
.sym 10977 $false
.sym 10992 $abc$760$n74_1
.sym 10993 $abc$760$n69
.sym 10994 $abc$760$n108
.sym 10995 $false
.sym 10998 $abc$760$n74_1
.sym 10999 $abc$760$n80
.sym 11000 $abc$760$n108
.sym 11001 $false
.sym 11002 $true
.sym 11003 hwclock$2$2
.sym 11004 $abc$760$n1$2
.sym 11005 $abc$760$n74_1
.sym 11006 $abc$760$n76_1
.sym 11007 $abc$760$n119
.sym 11008 $abc$760$n78_1
.sym 11009 $abc$760$n75_1
.sym 11010 $abc$760$n15
.sym 11011 foo.counter[3]
.sym 11012 foo.counter[7]
.sym 11041 $true
.sym 11078 foo.counter[0]$2
.sym 11079 $false
.sym 11080 foo.counter[0]
.sym 11081 $false
.sym 11082 $false
.sym 11084 $auto$alumacc.cc:474:replace_alu$84.C[2]
.sym 11086 $false
.sym 11087 foo.counter[1]
.sym 11090 $auto$alumacc.cc:474:replace_alu$84.C[3]
.sym 11091 $false
.sym 11092 $false
.sym 11093 foo.counter[2]
.sym 11094 $auto$alumacc.cc:474:replace_alu$84.C[2]
.sym 11096 $auto$alumacc.cc:474:replace_alu$84.C[4]
.sym 11097 $false
.sym 11098 $false
.sym 11099 foo.counter[3]
.sym 11100 $auto$alumacc.cc:474:replace_alu$84.C[3]
.sym 11102 $auto$alumacc.cc:474:replace_alu$84.C[5]
.sym 11103 $false
.sym 11104 $false
.sym 11105 foo.counter[4]
.sym 11106 $auto$alumacc.cc:474:replace_alu$84.C[4]
.sym 11108 $auto$alumacc.cc:474:replace_alu$84.C[6]
.sym 11109 $false
.sym 11110 $false
.sym 11111 foo.counter[5]
.sym 11112 $auto$alumacc.cc:474:replace_alu$84.C[5]
.sym 11114 $auto$alumacc.cc:474:replace_alu$84.C[7]
.sym 11115 $false
.sym 11116 $false
.sym 11117 foo.counter[6]
.sym 11118 $auto$alumacc.cc:474:replace_alu$84.C[6]
.sym 11120 $auto$alumacc.cc:474:replace_alu$84.C[8]
.sym 11121 $false
.sym 11122 $false
.sym 11123 foo.counter[7]
.sym 11124 $auto$alumacc.cc:474:replace_alu$84.C[7]
.sym 11128 $abc$760$n6
.sym 11129 $abc$760$n2
.sym 11130 $abc$760$n77_1
.sym 11131 $abc$760$n3
.sym 11132 $abc$760$n8
.sym 11133 $abc$760$n122
.sym 11134 foo.counter[11]
.sym 11135 foo.counter[9]
.sym 11164 $auto$alumacc.cc:474:replace_alu$84.C[8]
.sym 11201 $auto$alumacc.cc:474:replace_alu$84.C[9]
.sym 11202 $false
.sym 11203 $false
.sym 11204 foo.counter[8]
.sym 11205 $auto$alumacc.cc:474:replace_alu$84.C[8]
.sym 11207 $auto$alumacc.cc:474:replace_alu$84.C[10]
.sym 11208 $false
.sym 11209 $false
.sym 11210 foo.counter[9]
.sym 11211 $auto$alumacc.cc:474:replace_alu$84.C[9]
.sym 11213 $auto$alumacc.cc:474:replace_alu$84.C[11]
.sym 11214 $false
.sym 11215 $false
.sym 11216 foo.counter[10]
.sym 11217 $auto$alumacc.cc:474:replace_alu$84.C[10]
.sym 11219 $auto$alumacc.cc:474:replace_alu$84.C[12]
.sym 11220 $false
.sym 11221 $false
.sym 11222 foo.counter[11]
.sym 11223 $auto$alumacc.cc:474:replace_alu$84.C[11]
.sym 11226 $false
.sym 11227 $false
.sym 11228 foo.counter[12]
.sym 11229 $auto$alumacc.cc:474:replace_alu$84.C[12]
.sym 11232 $abc$760$n74_1
.sym 11233 $abc$760$n86
.sym 11234 $abc$760$n108
.sym 11235 $false
.sym 11238 $abc$760$n74_1
.sym 11239 $abc$760$n78
.sym 11240 $abc$760$n108
.sym 11241 $false
.sym 11244 $abc$760$n74_1
.sym 11245 $abc$760$n94
.sym 11246 $abc$760$n108
.sym 11247 $false
.sym 11248 $true
.sym 11249 hwclock$2$2
.sym 11250 $abc$760$n1$2
.sym 11349 $abc$760$n74_1
.sym 11350 $abc$760$n74
.sym 11351 $abc$760$n108
.sym 11352 $false
.sym 11355 $abc$760$n74_1
.sym 11356 $abc$760$n90
.sym 11357 $abc$760$n108
.sym 11358 $false
.sym 11371 $true
.sym 11372 hwclock$2$2
.sym 11373 $abc$760$n1$2
.sym 11627 $abc$760$n59
.sym 11724 $abc$760$n74_1
.sym 11725 $abc$760$n108
.sym 11726 $abc$760$n80_1
.sym 11727 $abc$760$n1$2
.sym 11745 $abc$760$n100
.sym 11746 $abc$760$n102
.sym 11747 $abc$760$n1
.sym 11748 foo.state[3]
.sym 11749 foo.state[0]
.sym 11750 foo.state[2]
.sym 11823 foo.state[2]
.sym 11824 foo.state[0]
.sym 11825 foo.state[3]
.sym 11826 foo.state[1]
.sym 11841 $false
.sym 11842 $false
.sym 11843 foo.state[0]
.sym 11844 $false
.sym 11847 foo.state[3]
.sym 11848 foo.state[1]
.sym 11849 foo.state[0]
.sym 11850 foo.state[2]
.sym 11853 $abc$760$n81_1
.sym 11854 foo.state[0]
.sym 11855 $false
.sym 11856 $false
.sym 11859 foo.state[1]
.sym 11860 $false
.sym 11861 $false
.sym 11862 $false
.sym 11863 $abc$760$n65
.sym 11864 hwclock$2$2
.sym 11865 $abc$760$n1$2
.sym 12992 $abc$760$n24
.sym 12995 $abc$760$n117
.sym 12996 $abc$760$n72
.sym 12997 $abc$760$n115
.sym 13071 $abc$760$n74_1
.sym 13072 $abc$760$n1$2
.sym 13073 foo.counter[0]
.sym 13074 $abc$760$n108
.sym 13083 foo.counter[1]
.sym 13084 $abc$760$n108
.sym 13085 $false
.sym 13086 $false
.sym 13111 $abc$760$n68
.sym 13112 hwclock$2$2
.sym 13113 $abc$760$n1$2
.sym 13188 $abc$760$n75_1
.sym 13189 $abc$760$n76_1
.sym 13190 $abc$760$n77_1
.sym 13191 $abc$760$n78_1
.sym 13194 foo.counter[2]
.sym 13195 foo.counter[3]
.sym 13196 foo.counter[4]
.sym 13197 foo.counter[8]
.sym 13200 foo.counter[7]
.sym 13201 $false
.sym 13202 $false
.sym 13203 $false
.sym 13206 foo.counter[9]
.sym 13207 foo.counter[6]
.sym 13208 foo.counter[7]
.sym 13209 foo.counter[5]
.sym 13212 foo.counter[0]
.sym 13213 foo.counter[1]
.sym 13214 $false
.sym 13215 $false
.sym 13218 foo.counter[3]
.sym 13219 $false
.sym 13220 $false
.sym 13221 $false
.sym 13224 $abc$760$n74_1
.sym 13225 $abc$760$n76
.sym 13226 $abc$760$n108
.sym 13227 $false
.sym 13230 $abc$760$n74_1
.sym 13231 $abc$760$n84
.sym 13232 $abc$760$n108
.sym 13233 $false
.sym 13234 $true
.sym 13235 hwclock$2$2
.sym 13236 $abc$760$n1$2
.sym 13242 $abc$760$n108
.sym 13243 $abc$760$n14
.sym 13244 $true$2
.sym 13311 foo.counter[9]
.sym 13312 $false
.sym 13313 $false
.sym 13314 $false
.sym 13317 foo.counter[12]
.sym 13318 $false
.sym 13319 $false
.sym 13320 $false
.sym 13323 foo.counter[11]
.sym 13324 foo.counter[12]
.sym 13325 foo.counter[10]
.sym 13326 $false
.sym 13329 foo.counter[11]
.sym 13330 $false
.sym 13331 $false
.sym 13332 $false
.sym 13335 foo.counter[8]
.sym 13336 $false
.sym 13337 $false
.sym 13338 $false
.sym 13341 foo.counter[10]
.sym 13342 $false
.sym 13343 $false
.sym 13344 $false
.sym 13347 $abc$760$n74_1
.sym 13348 $abc$760$n92
.sym 13349 $abc$760$n108
.sym 13350 $false
.sym 13353 $abc$760$n74_1
.sym 13354 $abc$760$n88
.sym 13355 $abc$760$n108
.sym 13356 $false
.sym 13357 $true
.sym 13358 hwclock$2$2
.sym 13359 $abc$760$n1$2
.sym 13845 $abc$760$n74_1
.sym 13846 $abc$760$n1$2
.sym 13847 $abc$760$n108
.sym 13848 $false
.sym 13888 $true
.sym 13925 foo.state[0]$2
.sym 13926 $false
.sym 13927 foo.state[0]
.sym 13928 $false
.sym 13929 $false
.sym 13931 $auto$alumacc.cc:474:replace_alu$87.C[2]
.sym 13933 $false
.sym 13934 foo.state[1]
.sym 13937 $auto$alumacc.cc:474:replace_alu$87.C[3]
.sym 13938 $false
.sym 13939 $false
.sym 13940 foo.state[2]
.sym 13941 $auto$alumacc.cc:474:replace_alu$87.C[2]
.sym 13944 $false
.sym 13945 $false
.sym 13946 foo.state[3]
.sym 13947 $auto$alumacc.cc:474:replace_alu$87.C[3]
.sym 13950 foo.state[3]
.sym 13951 foo.state[1]
.sym 13952 foo.state[2]
.sym 13953 foo.state[0]
.sym 13956 $abc$760$n81_1
.sym 13957 $abc$760$n102
.sym 13958 $false
.sym 13959 $false
.sym 13962 $abc$760$n81_1
.sym 13963 $abc$760$n96
.sym 13964 $false
.sym 13965 $false
.sym 13968 $abc$760$n81_1
.sym 13969 $abc$760$n100
.sym 13970 $false
.sym 13971 $false
.sym 13972 $abc$760$n59
.sym 13973 hwclock$2$2
.sym 13974 $abc$760$n1$2
.sym 14388 $abc$760$n1
.sym 15180 foo.counter[0]
.sym 15181 $false
.sym 15182 $false
.sym 15183 $false
.sym 15198 foo.counter[6]
.sym 15199 $false
.sym 15200 $false
.sym 15201 $false
.sym 15204 foo.counter[1]
.sym 15205 $false
.sym 15206 $false
.sym 15207 $false
.sym 15210 foo.counter[5]
.sym 15211 $false
.sym 15212 $false
.sym 15213 $false
.sym 15259 $true
.sym 15296 $abc$760$n24$2
.sym 15297 $false
.sym 15298 $abc$760$n24
.sym 15299 $false
.sym 15300 $false
.sym 15302 $auto$alumacc.cc:474:replace_alu$70.C[2]
.sym 15304 $true$2
.sym 15305 $abc$760$n72
.sym 15308 $auto$alumacc.cc:474:replace_alu$70.C[3]
.sym 15310 $false
.sym 15311 $abc$760$n17
.sym 15314 $auto$alumacc.cc:474:replace_alu$70.C[4]
.sym 15316 $false
.sym 15317 $abc$760$n15
.sym 15320 $auto$alumacc.cc:474:replace_alu$70.C[5]
.sym 15322 $false
.sym 15323 $abc$760$n14
.sym 15326 $auto$alumacc.cc:474:replace_alu$70.C[6]
.sym 15328 $true$2
.sym 15329 $abc$760$n115
.sym 15332 $auto$alumacc.cc:474:replace_alu$70.C[7]
.sym 15334 $true$2
.sym 15335 $abc$760$n117
.sym 15338 $auto$alumacc.cc:474:replace_alu$70.C[8]
.sym 15340 $true$2
.sym 15341 $abc$760$n119
.sym 15382 $auto$alumacc.cc:474:replace_alu$70.C[8]
.sym 15419 $auto$alumacc.cc:474:replace_alu$70.C[9]
.sym 15421 $false
.sym 15422 $abc$760$n8
.sym 15425 $auto$alumacc.cc:474:replace_alu$70.C[10]
.sym 15427 $false
.sym 15428 $abc$760$n6
.sym 15431 $auto$alumacc.cc:474:replace_alu$70.C[11]
.sym 15433 $true$2
.sym 15434 $abc$760$n122
.sym 15437 $auto$alumacc.cc:474:replace_alu$70.C[12]
.sym 15439 $false
.sym 15440 $abc$760$n3
.sym 15443 $abc$760$n108$2
.sym 15445 $false
.sym 15446 $abc$760$n2
.sym 15453 $abc$760$n108$2
.sym 15456 foo.counter[4]
.sym 15457 $false
.sym 15458 $false
.sym 15459 $false
.sym 15462 $false
.sym 15463 $false
.sym 15464 $false
.sym 15465 $false
.sym 17582 counter[1]
.sym 17708 counter[0]
.sym 19784 counter[1]
.sym 19785 $false
.sym 19786 $false
.sym 19787 $false
.sym 19806 counter[0]
.sym 19807 hwclock$2$2
.sym 19808 $false
.sym 19925 $false
.sym 19926 $false
.sym 19927 counter[0]
.sym 19928 $false
.sym 19929 $true
.sym 19930 hwclock$2$2
.sym 19931 $false
.sym 21598 counter[2]
.sym 21599 counter[3]
.sym 21600 counter[4]
.sym 21601 counter[5]
.sym 21602 counter[6]
.sym 21603 counter[7]
.sym 21698 counter[8]
.sym 21699 counter[9]
.sym 21700 counter[10]
.sym 21701 counter[11]
.sym 21702 counter[12]
.sym 21703 counter[13]
.sym 21704 counter[14]
.sym 21705 counter[15]
.sym 21800 counter[16]
.sym 21801 counter[17]
.sym 21802 counter[18]
.sym 21803 counter[19]
.sym 21804 counter[20]
.sym 21805 G$2
.sym 21806 N$2
.sym 23603 $true
.sym 23640 counter[0]$2
.sym 23641 $false
.sym 23642 counter[0]
.sym 23643 $false
.sym 23644 $false
.sym 23646 $auto$alumacc.cc:474:replace_alu$81.C[2]
.sym 23648 $false
.sym 23649 counter[1]
.sym 23652 $auto$alumacc.cc:474:replace_alu$81.C[3]
.sym 23653 $false
.sym 23654 $false
.sym 23655 counter[2]
.sym 23656 $auto$alumacc.cc:474:replace_alu$81.C[2]
.sym 23658 $auto$alumacc.cc:474:replace_alu$81.C[4]
.sym 23659 $false
.sym 23660 $false
.sym 23661 counter[3]
.sym 23662 $auto$alumacc.cc:474:replace_alu$81.C[3]
.sym 23664 $auto$alumacc.cc:474:replace_alu$81.C[5]
.sym 23665 $false
.sym 23666 $false
.sym 23667 counter[4]
.sym 23668 $auto$alumacc.cc:474:replace_alu$81.C[4]
.sym 23670 $auto$alumacc.cc:474:replace_alu$81.C[6]
.sym 23671 $false
.sym 23672 $false
.sym 23673 counter[5]
.sym 23674 $auto$alumacc.cc:474:replace_alu$81.C[5]
.sym 23676 $auto$alumacc.cc:474:replace_alu$81.C[7]
.sym 23677 $false
.sym 23678 $false
.sym 23679 counter[6]
.sym 23680 $auto$alumacc.cc:474:replace_alu$81.C[6]
.sym 23682 $auto$alumacc.cc:474:replace_alu$81.C[8]
.sym 23683 $false
.sym 23684 $false
.sym 23685 counter[7]
.sym 23686 $auto$alumacc.cc:474:replace_alu$81.C[7]
.sym 23687 $true
.sym 23688 hwclock$2$2
.sym 23689 $false
.sym 23726 $auto$alumacc.cc:474:replace_alu$81.C[8]
.sym 23763 $auto$alumacc.cc:474:replace_alu$81.C[9]
.sym 23764 $false
.sym 23765 $false
.sym 23766 counter[8]
.sym 23767 $auto$alumacc.cc:474:replace_alu$81.C[8]
.sym 23769 $auto$alumacc.cc:474:replace_alu$81.C[10]
.sym 23770 $false
.sym 23771 $false
.sym 23772 counter[9]
.sym 23773 $auto$alumacc.cc:474:replace_alu$81.C[9]
.sym 23775 $auto$alumacc.cc:474:replace_alu$81.C[11]
.sym 23776 $false
.sym 23777 $false
.sym 23778 counter[10]
.sym 23779 $auto$alumacc.cc:474:replace_alu$81.C[10]
.sym 23781 $auto$alumacc.cc:474:replace_alu$81.C[12]
.sym 23782 $false
.sym 23783 $false
.sym 23784 counter[11]
.sym 23785 $auto$alumacc.cc:474:replace_alu$81.C[11]
.sym 23787 $auto$alumacc.cc:474:replace_alu$81.C[13]
.sym 23788 $false
.sym 23789 $false
.sym 23790 counter[12]
.sym 23791 $auto$alumacc.cc:474:replace_alu$81.C[12]
.sym 23793 $auto$alumacc.cc:474:replace_alu$81.C[14]
.sym 23794 $false
.sym 23795 $false
.sym 23796 counter[13]
.sym 23797 $auto$alumacc.cc:474:replace_alu$81.C[13]
.sym 23799 $auto$alumacc.cc:474:replace_alu$81.C[15]
.sym 23800 $false
.sym 23801 $false
.sym 23802 counter[14]
.sym 23803 $auto$alumacc.cc:474:replace_alu$81.C[14]
.sym 23805 $auto$alumacc.cc:474:replace_alu$81.C[16]
.sym 23806 $false
.sym 23807 $false
.sym 23808 counter[15]
.sym 23809 $auto$alumacc.cc:474:replace_alu$81.C[15]
.sym 23810 $true
.sym 23811 hwclock$2$2
.sym 23812 $false
.sym 23849 $auto$alumacc.cc:474:replace_alu$81.C[16]
.sym 23886 $auto$alumacc.cc:474:replace_alu$81.C[17]
.sym 23887 $false
.sym 23888 $false
.sym 23889 counter[16]
.sym 23890 $auto$alumacc.cc:474:replace_alu$81.C[16]
.sym 23892 $auto$alumacc.cc:474:replace_alu$81.C[18]
.sym 23893 $false
.sym 23894 $false
.sym 23895 counter[17]
.sym 23896 $auto$alumacc.cc:474:replace_alu$81.C[17]
.sym 23898 $auto$alumacc.cc:474:replace_alu$81.C[19]
.sym 23899 $false
.sym 23900 $false
.sym 23901 counter[18]
.sym 23902 $auto$alumacc.cc:474:replace_alu$81.C[18]
.sym 23904 $auto$alumacc.cc:474:replace_alu$81.C[20]
.sym 23905 $false
.sym 23906 $false
.sym 23907 counter[19]
.sym 23908 $auto$alumacc.cc:474:replace_alu$81.C[19]
.sym 23910 $auto$alumacc.cc:474:replace_alu$81.C[21]
.sym 23911 $false
.sym 23912 $false
.sym 23913 counter[20]
.sym 23914 $auto$alumacc.cc:474:replace_alu$81.C[20]
.sym 23916 $auto$alumacc.cc:474:replace_alu$81.C[22]
.sym 23917 $false
.sym 23918 $false
.sym 23919 G$2
.sym 23920 $auto$alumacc.cc:474:replace_alu$81.C[21]
.sym 23923 $false
.sym 23924 $false
.sym 23925 N$2
.sym 23926 $auto$alumacc.cc:474:replace_alu$81.C[22]
.sym 23933 $true
.sym 23934 hwclock$2$2
.sym 23935 $false
.sym 27283 $undef
.sym 27463 G$2
.sym 27519 $undef
.sym 27522 $undef
.sym 27549 $undef
.sym 27552 N$2