Move test_gfx rom to subdir
The test_gfx rom is doing some kind of blinking light thing, move it to a subdir.
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justfile
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justfile
@ -4,3 +4,5 @@ default:
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greenspace_smc:
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greenspace_smc:
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just greenspace/greenspace_smc
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just greenspace/greenspace_smc
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test_gfx:
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just legacy/test_gfx/test_gfx
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55
legacy/test_gfx/header.inc
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55
legacy/test_gfx/header.inc
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@ -0,0 +1,55 @@
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;==LoRom== ; We'll get to HiRom some other time.
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.MEMORYMAP ; Begin describing the system architecture.
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SLOTSIZE $8000 ; The slot is $8000 bytes in size. More details on slots later.
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DEFAULTSLOT 0
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SLOT 0 $8000 ; Defines Slot 0's starting address.
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.ENDME ; End MemoryMap definition
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.ROMBANKSIZE $8000 ; Every ROM bank is 32 KBytes in size
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.ROMBANKS 8 ; 2 Mbits - Tell WLA we want to use 8 ROM Banks
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.SNESHEADER
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ID "SNES" ; 1-4 letter string, just leave it as "SNES"
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NAME "SNES Tile Demo " ; Program Title - can't be over 21 bytes,
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; "123456789012345678901" ; use spaces for unused bytes of the name.
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SLOWROM
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LOROM
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CARTRIDGETYPE $00 ; $00 = ROM only, see WLA documentation for others
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ROMSIZE $08 ; $08 = 2 Mbits, see WLA doc for more..
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SRAMSIZE $00 ; No SRAM see WLA doc for more..
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COUNTRY $01 ; $01 = U.S. $00 = Japan, that's all I know
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LICENSEECODE $00 ; Just use $00
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VERSION $00 ; $00 = 1.00, $01 = 1.01, etc.
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.ENDSNES
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.SNESNATIVEVECTOR ; Define Native Mode interrupt vector table
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COP EmptyHandler
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BRK EmptyHandler
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ABORT EmptyHandler
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NMI VBlank
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IRQ EmptyHandler
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.ENDNATIVEVECTOR
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.SNESEMUVECTOR ; Define Emulation Mode interrupt vector table
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COP EmptyHandler
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ABORT EmptyHandler
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NMI EmptyHandler
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RESET Start ; where execution starts
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IRQBRK EmptyHandler
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.ENDEMUVECTOR
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.BANK 0 SLOT 0 ; Defines the ROM bank and the slot it is inserted in memory.
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.ORG 0 ; .ORG 0 is really $8000, because the slot starts at $8000
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.SECTION "EmptyVectors" SEMIFREE
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EmptyHandler:
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rti
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.ENDS
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.EMPTYFILL $00 ; fill unused areas with $00, opcode for BRK.
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; BRK will crash the snes if executed.
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5
legacy/test_gfx/justfile
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5
legacy/test_gfx/justfile
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@ -0,0 +1,5 @@
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test_gfx:
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wla-65816 -o test_gfx.obj test_gfx.asm
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wlalink -r test_gfx.link test_gfx.smc
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102
legacy/test_gfx/snes_init.asm
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102
legacy/test_gfx/snes_init.asm
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.MACRO Snes_Init
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sei ; Disabled interrupts
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clc ; clear carry to switch to native mode
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xce ; Xchange carry & emulation bit. native mode
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rep #$18 ; Binary mode (decimal mode off), X/Y 16 bit
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ldx #$1FFF ; set stack to $1FFF
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txs
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jsr Init
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.ENDM
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.bank 0
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.section "Snes_Init" SEMIFREE
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Init:
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sep #$30 ; X,Y,A are 8 bit numbers
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lda #$8F ; screen off, full brightness
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sta $2100 ; brightness + screen enable register
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stz $2101 ; Sprite register (size + address in VRAM)
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stz $2102 ; Sprite registers (address of sprite memory [OAM])
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stz $2103 ; "" ""
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stz $2105 ; Mode 0, = Graphic mode register
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stz $2106 ; noplanes, no mosaic, = Mosaic register
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stz $2107 ; Plane 0 map VRAM location
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stz $2108 ; Plane 1 map VRAM location
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stz $2109 ; Plane 2 map VRAM location
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stz $210A ; Plane 3 map VRAM location
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stz $210B ; Plane 0+1 Tile data location
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stz $210C ; Plane 2+3 Tile data location
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stz $210D ; Plane 0 scroll x (first 8 bits)
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stz $210D ; Plane 0 scroll x (last 3 bits) #$0 - #$07ff
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lda #$FF ; The top pixel drawn on the screen isn't the top one in the tilemap, it's the one above that.
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sta $210E ; Plane 0 scroll y (first 8 bits)
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sta $2110 ; Plane 1 scroll y (first 8 bits)
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sta $2112 ; Plane 2 scroll y (first 8 bits)
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sta $2114 ; Plane 3 scroll y (first 8 bits)
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lda #$07 ; Since this could get quite annoying, it's better to edit the scrolling registers to fix this.
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sta $210E ; Plane 0 scroll y (last 3 bits) #$0 - #$07ff
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sta $2110 ; Plane 1 scroll y (last 3 bits) #$0 - #$07ff
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sta $2112 ; Plane 2 scroll y (last 3 bits) #$0 - #$07ff
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sta $2114 ; Plane 3 scroll y (last 3 bits) #$0 - #$07ff
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stz $210F ; Plane 1 scroll x (first 8 bits)
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stz $210F ; Plane 1 scroll x (last 3 bits) #$0 - #$07ff
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stz $2111 ; Plane 2 scroll x (first 8 bits)
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stz $2111 ; Plane 2 scroll x (last 3 bits) #$0 - #$07ff
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stz $2113 ; Plane 3 scroll x (first 8 bits)
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stz $2113 ; Plane 3 scroll x (last 3 bits) #$0 - #$07ff
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lda #$80 ; increase VRAM address after writing to $2119
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sta $2115 ; VRAM address increment register
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stz $2116 ; VRAM address low
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stz $2117 ; VRAM address high
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stz $211A ; Initial Mode 7 setting register
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stz $211B ; Mode 7 matrix parameter A register (low)
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lda #$01
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sta $211B ; Mode 7 matrix parameter A register (high)
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stz $211C ; Mode 7 matrix parameter B register (low)
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stz $211C ; Mode 7 matrix parameter B register (high)
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stz $211D ; Mode 7 matrix parameter C register (low)
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stz $211D ; Mode 7 matrix parameter C register (high)
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stz $211E ; Mode 7 matrix parameter D register (low)
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sta $211E ; Mode 7 matrix parameter D register (high)
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stz $211F ; Mode 7 center position X register (low)
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stz $211F ; Mode 7 center position X register (high)
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stz $2120 ; Mode 7 center position Y register (low)
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stz $2120 ; Mode 7 center position Y register (high)
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stz $2121 ; Color number register ($0-ff)
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stz $2123 ; BG1 & BG2 Window mask setting register
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stz $2124 ; BG3 & BG4 Window mask setting register
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stz $2125 ; OBJ & Color Window mask setting register
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stz $2126 ; Window 1 left position register
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stz $2127 ; Window 2 left position register
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stz $2128 ; Window 3 left position register
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stz $2129 ; Window 4 left position register
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stz $212A ; BG1, BG2, BG3, BG4 Window Logic register
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stz $212B ; OBJ, Color Window Logic Register (or,and,xor,xnor)
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sta $212C ; Main Screen designation (planes, sprites enable)
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stz $212D ; Sub Screen designation
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stz $212E ; Window mask for Main Screen
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stz $212F ; Window mask for Sub Screen
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lda #$30
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sta $2130 ; Color addition & screen addition init setting
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stz $2131 ; Add/Sub sub designation for screen, sprite, color
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lda #$E0
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sta $2132 ; color data for addition/subtraction
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stz $2133 ; Screen setting (interlace x,y/enable SFX data)
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stz $4200 ; Enable V-blank, interrupt, Joypad register
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lda #$FF
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sta $4201 ; Programmable I/O port
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stz $4202 ; Multiplicand A
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stz $4203 ; Multiplier B
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stz $4204 ; Multiplier C
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stz $4205 ; Multiplicand C
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stz $4206 ; Divisor B
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stz $4207 ; Horizontal Count Timer
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stz $4208 ; Horizontal Count Timer MSB (most significant bit)
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stz $4209 ; Vertical Count Timer
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stz $420A ; Vertical Count Timer MSB
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stz $420B ; General DMA enable (bits 0-7)
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stz $420C ; Horizontal DMA (HDMA) enable (bits 0-7)
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stz $420D ; Access cycle designation (slow/fast rom)
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cli ; Enable interrupts
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rts
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.ends
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