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1
.gitignore
vendored
1
.gitignore
vendored
@ -1,4 +1,3 @@
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*.swp
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*.smc
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*.obj
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out/
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34
Makefile
Normal file
34
Makefile
Normal file
@ -0,0 +1,34 @@
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#all: smc
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all: test_gfx
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BINPATH := /home/greg/code/wla-dx/binaries
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test_gfx: test_gfx.obj
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$(BINPATH)/wlalink -v -r test_gfx.link test_gfx.smc
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test_gfx.obj: test_gfx.asm
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$(BINPATH)/wla-65816 -v -o test_gfx.obj test_gfx.asm
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tic_tac: tic_tac.obj
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$(BINPATH)/wlalink -v -r tic_tac.link tic_tac.smc
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tic_tac.obj: tic_tac.asm
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$(BINPATH)/wla-65816 -v -o tic_tac.obj tic_tac.asm
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greenspace.obj: greenspace.asm
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wla-65816 -vo greenspace.asm greenspace.obj
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smc: greenspace.obj
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wlalink -vr greenspace.link greenspace.smc
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clean:
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rm -f *.obj
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rm -f greenspace.smc
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rm -f tic_tac.smc
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rm -f test_gfx.smc
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@ -1,201 +0,0 @@
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charset:
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; tile 0x00
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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; tile 0x01
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.byte %11110000 ; row 0, color 0
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.byte %11111111 ; row 0, color 1
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.byte %10000001 ; row 1, color 0
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.byte %00000000 ; row 1, color 1
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.byte %10000001 ; row 2, color 0
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.byte %00000000 ; row 2, color 1
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.byte %10000001 ; row 3, color 0
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.byte %00001000 ; row 3, color 1
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.byte %10011001 ; row 4, color 0
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.byte %00001000 ; row 4, color 1
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.byte %10000001 ; row 5, color 0
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.byte %00000000 ; row 5, color 1
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.byte %10000001 ; row 6, color 0
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.byte %00000000 ; row 6, color 1
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.byte %11111111 ; row 7, color 0
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.byte %00000000 ; row 7, color 1
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; tile 0x02
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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; This is tile 0x02 in 2bpp mode (what the background uses), but tile
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; 0x01 in 4bpp mode (what the sprites use). It's very strange to mix
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; these, but my assumption is that by this point you've already got
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; your own graphics pipeline of some sort and probably aren't using
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; 2bpp graphics at all any more, so I'm sure you can figure out what'll
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; work best for you on your own :)
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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; normally you would put 14 other 8x8 tiles here, but we don't have
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; any, so just fill it with zeros.
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.repeat 14 * 32
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.byte 0
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.endrepeat
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.byte %11100000
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %11100000
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %00000111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %11111111
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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.byte %00000000
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charset_end:
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@ -1,30 +0,0 @@
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.segment "HEADER"
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.byte "GNOSTIKKA " ; ROM name, must be 21 chars
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.byte $30 ; Map Mode: 3.58MHz LoROM
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.byte $00 ; Cartridge Type: ROM only
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.byte $08 ; ROM Size
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.byte $00 ; RAM size
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.byte $01 ; Destination Code: USA
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.byte $33 ; Fixed value
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.byte $00 ; Mask ROM Version
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.word $0000 ; Complement Check
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.word $0000 ; Check Sum
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; native mode vectors
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.word 0, 0
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.addr _rti ; COP
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.addr _rti ; BRK
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.addr _rti ; ABORT
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.addr nmi ; NMI
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.addr start ; RST
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.addr _rti ; IRQ
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; emulation mode vectors - largely unused, since we run in native mode
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.word 0, 0
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.addr 0
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.addr 0
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.addr 0
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.addr 0
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.addr start ; RST
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.addr 0
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@ -1,49 +0,0 @@
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; A very simple SNES init routine
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; For serious use, you probably want to do more than this
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; This is simple and understandable, though
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; Will leave you in A8 XY16 mode
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; Disable interrupts and enable native (i.e. not 6502-emulating) mode
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sei
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clc
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xce
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cld
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setAXY16
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; ZeroCPU registers NMITIMEN through MEMSEL
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stz $4200
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stz $4202
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stz $4204
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stz $4206
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stz $4208
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stz $420A
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stz $420C
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lda #$0080
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sta INIDISP ; Turn off screen ("forced blank")
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; Zero some registers used for rendering
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stz OAMADDL
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stz BGMODE
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stz BG1SC
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stz BG3SC
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stz BG12NBA
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stz VMADDL
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stz W12SEL
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stz WH0
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stz WH2
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stz WBGLOG
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stz TM
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stz TMW
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; Disable color math / etc
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ldx #$0030
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stx CGWSEL
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ldy #$00E0
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sty COLDATA
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setA8
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; Zero window masks
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stz WOBJSEL
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@ -1,17 +0,0 @@
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; Joypad bitmaps
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JOYH_B = %10000000
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JOYH_Y = %01000000
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JOYH_SEL = %00100000
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JOYH_START = %00010000
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JOYH_UP = %00001000
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JOYH_DOWN = %00000100
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JOYH_LEFT = %00000010
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JOYH_RIGHT = %00000001
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JOYL_A = %10000000
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JOYL_X = %01000000
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JOYL_L = %00100000
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JOYL_R = %00010000
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@ -1,33 +0,0 @@
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MEMORY {
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ZEROPAGE: start = $000000, size = $0100;
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STACK: start = $000100, size = $0100;
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BSS: start = $000200, size = $1E00;
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BSS7E: start = $7E2000, size = $E000;
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BSS7F: start = $7F0000, size =$10000;
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ROM0: start = $808000, size = $8000, fill = yes;
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ROM1: start = $818000, size = $8000, fill = yes;
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ROM2: start = $828000, size = $8000, fill = yes;
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ROM3: start = $838000, size = $8000, fill = yes;
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ROM4: start = $848000, size = $8000, fill = yes;
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ROM5: start = $858000, size = $8000, fill = yes;
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ROM6: start = $868000, size = $8000, fill = yes;
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ROM7: start = $878000, size = $8000, fill = yes;
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}
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SEGMENTS {
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CODE: load = ROM0, align = $100;
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HEADER: load = ROM0, start = $80FFC0;
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CODE1: load = ROM1, align = $100, optional=yes;
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CODE2: load = ROM2, align = $100, optional=yes;
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CODE3: load = ROM3, align = $100, optional=yes;
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CODE4: load = ROM4, align = $100, optional=yes;
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CODE5: load = ROM5, align = $100, optional=yes;
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CODE6: load = ROM6, align = $100, optional=yes;
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CODE7: load = ROM7, align = $100, optional=yes;
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ZEROPAGE: load = ZEROPAGE, type = zp, define=yes;
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BSS: load = BSS, type = bss, align = $100, optional=yes;
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BSS7E: load = BSS7E, type = bss, align = $100, optional=yes;
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BSS7F: load = BSS7F, type = bss, align = $100, optional=yes;
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}
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@ -1,23 +0,0 @@
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.macro setA8
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sep #$20
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.endmacro
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.macro setA16
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rep #$20
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.endmacro
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.macro setAXY8
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sep #$30
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.endmacro
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.macro setAXY16
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rep #$30
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.endmacro
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.macro setXY8
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sep #$10
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.endmacro
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.macro setXY16
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rep #$10
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.endmacro
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@ -1,216 +0,0 @@
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.p816
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.smart
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.include "macros.inc"
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.include "registers.inc"
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.include "keys.inc"
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.include "header.asm"
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.segment "ZEROPAGE"
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nmi_count: .res 2
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.segment "BSS"
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oam_lo_buffer: .res 512
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oam_hi_buffer: .res 32
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oam_buffer_end:
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.segment "CODE"
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VRAM_CHARS = $0000
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VRAM_BG1 = $1000
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start:
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.include "init.asm"
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; Set up the color palette
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stz CGADD
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; Color 0 - black
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lda #$00
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sta CGDATA
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lda #$00
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sta CGDATA
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; Color 1 - red
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lda #$1f
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sta CGDATA
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lda #$00
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sta CGDATA
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; Color 2 - green
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lda #$e0
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sta CGDATA
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lda #$03
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sta CGDATA
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; Color 3 - blue
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lda #$00
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sta CGDATA
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lda #$7c
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sta CGDATA
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; Set up sprite palette
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lda #128 ;sprite palettes begin at cgdata index 128
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sta CGADD
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stz CGDATA
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stz CGDATA
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lda #$1f
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sta CGDATA
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stz CGDATA
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; Graphics mode 0, 8x8 tiles
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stz BGMODE
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; Set BG1 and tile map and character data
|
||||
lda #>VRAM_BG1
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sta BG1SC
|
||||
lda #VRAM_CHARS
|
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sta BG12NBA
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||||
|
||||
; Load character data into VRAM
|
||||
lda #$80
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||||
sta VMAIN
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||||
ldx #VRAM_CHARS
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stx VMADDL
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|
||||
; Set DMA source flags
|
||||
lda #%00000001
|
||||
sta DMAP0
|
||||
|
||||
; DMA destination VMDATAL register
|
||||
lda #<VMDATAL
|
||||
sta BBAD0
|
||||
|
||||
; Set starting address to charset
|
||||
ldx #.loword(charset)
|
||||
stx A1T0L
|
||||
lda #^charset
|
||||
sta A1B0
|
||||
|
||||
; Write to charset_end bytes
|
||||
ldx #(charset_end - charset)
|
||||
stx DAS0L
|
||||
|
||||
; actually kick off the DMA
|
||||
lda #1
|
||||
sta MDMAEN
|
||||
|
||||
|
||||
|
||||
; @charset_loop:
|
||||
; lda charset,x
|
||||
; sta VMDATAL
|
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; inx
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||||
; lda charset,x
|
||||
; sta VMDATAH
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||||
; inx
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||||
; cpx #(charset_end - charset)
|
||||
; bne @charset_loop
|
||||
|
||||
; Manually clear screen
|
||||
ldx #(VRAM_BG1)
|
||||
@loop:
|
||||
stx VMADDL
|
||||
lda #$00
|
||||
sta VMDATAL
|
||||
stz VMDATAH
|
||||
inx
|
||||
cpx #(VRAM_BG1 + 32 * 29)
|
||||
bne @loop
|
||||
|
||||
; write tile to position (1, 1)
|
||||
TILE_X = 1
|
||||
TILE_Y = 1
|
||||
ldx #(VRAM_BG1 + (TILE_Y * 32) + TILE_X)
|
||||
stx VMADDL
|
||||
lda #$01 ; tile number
|
||||
sta VMDATAL
|
||||
stz VMDATAH
|
||||
|
||||
; Show bg1 + sprites
|
||||
lda #%00010001
|
||||
sta TM
|
||||
|
||||
lda #$0f
|
||||
sta INIDISP
|
||||
|
||||
lda #$0
|
||||
sta OBSEL
|
||||
|
||||
ldx #0
|
||||
@zero_oam:
|
||||
stz oam_lo_buffer, x
|
||||
inx
|
||||
cpx #(oam_buffer_end - oam_lo_buffer)
|
||||
bne @zero_oam
|
||||
|
||||
lda #%10000001
|
||||
sta NMITIMEN
|
||||
|
||||
mainloop:
|
||||
|
||||
lda nmi_count
|
||||
nmi_check:
|
||||
wai
|
||||
cmp nmi_count
|
||||
beq nmi_check
|
||||
|
||||
; set sprite 0 X position
|
||||
ldx #$42
|
||||
stx oam_lo_buffer
|
||||
|
||||
; set sprite 0 Y position
|
||||
ldx #$69
|
||||
stx oam_lo_buffer + 1
|
||||
; Set sprite 0 to priority 3 and tile 0x01
|
||||
ldx #((%00110000 << 8) | $0001)
|
||||
stx oam_lo_buffer + 2
|
||||
|
||||
; Set sprite 0 to be large (16x16)
|
||||
lda #%00000010
|
||||
sta oam_hi_buffer
|
||||
|
||||
; Copy OAM data via DMA
|
||||
stz OAMADDL
|
||||
lda #$0
|
||||
sta DMAP1
|
||||
lda #<OAMDATA
|
||||
sta BBAD1
|
||||
ldx #.loword(oam_lo_buffer)
|
||||
stx A1B1
|
||||
ldx #(oam_buffer_end - oam_lo_buffer)
|
||||
stx DAS1L
|
||||
lda #%00000010
|
||||
sta MDMAEN
|
||||
|
||||
|
||||
|
||||
lda JOY1L
|
||||
bit #JOYL_L
|
||||
beq down_not_pressed
|
||||
; write tile 2 to position (4, 8)
|
||||
TILE_X2= 4
|
||||
TILE_Y2= 8
|
||||
ldx #(VRAM_BG1 + (TILE_Y2* 32) + TILE_X2)
|
||||
stx VMADDL
|
||||
lda #$02
|
||||
sta VMDATAL
|
||||
stz VMDATAH
|
||||
down_not_pressed:
|
||||
|
||||
bra mainloop
|
||||
|
||||
busywait:
|
||||
bra busywait
|
||||
|
||||
nmi:
|
||||
bit RDNMI
|
||||
inc nmi_count
|
||||
_rti:
|
||||
rti
|
||||
|
||||
.include "charset.asm"
|
@ -1,216 +0,0 @@
|
||||
|
||||
; SNES Register Aliases
|
||||
|
||||
; Address Bus B Registers
|
||||
|
||||
INIDISP = $2100 ; Screen Display Register single write any time
|
||||
OBSEL = $2101 ; Object Size and Character Size Register single write f-blank, v-blank
|
||||
OAMADDL = $2102 ; OAM Address Registers (Low) single write f-blank, v-blank
|
||||
OAMADDH = $2103 ; OAM Address Registers (High) single write f-blank, v-blank
|
||||
OAMDATA = $2104 ; OAM Data Write Register single write f-blank, v-blank
|
||||
BGMODE = $2105 ; BG Mode and Character Size Register single write f-blank, v-blank, h-blank
|
||||
MOSAIC = $2106 ; Mosaic Register single write f-blank, v-blank, h-blank
|
||||
BG1SC = $2107 ; BG Tilemap Address Registers (BG1) single write f-blank, v-blank
|
||||
BG2SC = $2108 ; BG Tilemap Address Registers (BG2) single write f-blank, v-blank
|
||||
BG3SC = $2109 ; BG Tilemap Address Registers (BG3) single write f-blank, v-blank
|
||||
BG4SC = $210A ; BG Tilemap Address Registers (BG4) single write f-blank, v-blank
|
||||
BG12NBA = $210B ; BG Character Address Registers (BG1&2) single write f-blank, v-blank
|
||||
BG34NBA = $210C ; BG Character Address Registers (BG3&4) single write f-blank, v-blank
|
||||
BG1HOFS = $210D ; BG Scroll Registers (BG1) dual write f-blank, v-blank, h-blank
|
||||
BG1VOFS = $210E ; BG Scroll Registers (BG1) dual write f-blank, v-blank, h-blank
|
||||
BG2HOFS = $210F ; BG Scroll Registers (BG2) dual write f-blank, v-blank, h-blank
|
||||
BG2VOFS = $2110 ; BG Scroll Registers (BG2) dual write f-blank, v-blank, h-blank
|
||||
BG3HOFS = $2111 ; BG Scroll Registers (BG3) dual write f-blank, v-blank, h-blank
|
||||
BG3VOFS = $2112 ; BG Scroll Registers (BG3) dual write f-blank, v-blank, h-blank
|
||||
BG4HOFS = $2113 ; BG Scroll Registers (BG4) dual write f-blank, v-blank, h-blank
|
||||
BG4VOFS = $2114 ; BG Scroll Registers (BG4) dual write f-blank, v-blank, h-blank
|
||||
VMAIN = $2115 ; Video Port Control Register single write f-blank, v-blank
|
||||
VMADDL = $2116 ; VRAM Address Registers (Low) single write f-blank, v-blank
|
||||
VMADDH = $2117 ; VRAM Address Registers (High) single write f-blank, v-blank
|
||||
VMDATAL = $2118 ; VRAM Data Write Registers (Low) single write f-blank, v-blank
|
||||
VMDATAH = $2119 ; VRAM Data Write Registers (High) single write f-blank, v-blank
|
||||
M7SEL = $211A ; Mode 7 Settings Register single write f-blank, v-blank
|
||||
M7A = $211B ; Mode 7 Matrix Registers dual write f-blank, v-blank, h-blank
|
||||
M7B = $211C ; Mode 7 Matrix Registers dual write f-blank, v-blank, h-blank
|
||||
M7C = $211D ; Mode 7 Matrix Registers dual write f-blank, v-blank, h-blank
|
||||
M7D = $211E ; Mode 7 Matrix Registers dual write f-blank, v-blank, h-blank
|
||||
M7X = $211F ; Mode 7 Matrix Registers dual write f-blank, v-blank, h-blank
|
||||
M7Y = $2120 ; Mode 7 Matrix Registers dual write f-blank, v-blank, h-blank
|
||||
CGADD = $2121 ; CGRAM Address Register single write f-blank, v-blank, h-blank
|
||||
CGDATA = $2122 ; CGRAM Data Write Register dual write f-blank, v-blank, h-blank
|
||||
W12SEL = $2123 ; Window Mask Settings Registers single write f-blank, v-blank, h-blank
|
||||
W34SEL = $2124 ; Window Mask Settings Registers single write f-blank, v-blank, h-blank
|
||||
WOBJSEL = $2125 ; Window Mask Settings Registers single write f-blank, v-blank, h-blank
|
||||
WH0 = $2126 ; Window Position Registers (WH0) single write f-blank, v-blank, h-blank
|
||||
WH1 = $2127 ; Window Position Registers (WH1) single write f-blank, v-blank, h-blank
|
||||
WH2 = $2128 ; Window Position Registers (WH2) single write f-blank, v-blank, h-blank
|
||||
WH3 = $2129 ; Window Position Registers (WH3) single write f-blank, v-blank, h-blank
|
||||
WBGLOG = $212A ; Window Mask Logic registers (BG) single write f-blank, v-blank, h-blank
|
||||
WOBJLOG = $212B ; Window Mask Logic registers (OBJ) single write f-blank, v-blank, h-blank
|
||||
TM = $212C ; Screen Destination Registers single write f-blank, v-blank, h-blank
|
||||
TS = $212D ; Screen Destination Registers single write f-blank, v-blank, h-blank
|
||||
TMW = $212E ; Window Mask Destination Registers single write f-blank, v-blank, h-blank
|
||||
TSW = $212F ; Window Mask Destination Registers single write f-blank, v-blank, h-blank
|
||||
CGWSEL = $2130 ; Color Math Registers single write f-blank, v-blank, h-blank
|
||||
CGADSUB = $2131 ; Color Math Registers single write f-blank, v-blank, h-blank
|
||||
COLDATA = $2132 ; Color Math Registers single write f-blank, v-blank, h-blank
|
||||
SETINI = $2133 ; Screen Mode Select Register single write f-blank, v-blank, h-blank
|
||||
MPYL = $2134 ; Multiplication Result Registers single read f-blank, v-blank, h-blank
|
||||
MPYM = $2135 ; Multiplication Result Registers single read f-blank, v-blank, h-blank
|
||||
MPYH = $2136 ; Multiplication Result Registers single read f-blank, v-blank, h-blank
|
||||
SLHV = $2137 ; Software Latch Register single any time
|
||||
OAMDATAREAD = $2138 ; OAM Data Read Register dual read f-blank, v-blank
|
||||
VMDATALREAD = $2139 ; VRAM Data Read Register (Low) single read f-blank, v-blank
|
||||
VMDATAHREAD = $213A ; VRAM Data Read Register (High) single read f-blank, v-blank
|
||||
CGDATAREAD = $213B ; CGRAM Data Read Register dual read f-blank, v-blank
|
||||
OPHCT = $213C ; Scanline Location Registers (Horizontal) dual read any time
|
||||
OPVCT = $213D ; Scanline Location Registers (Vertical) dual read any time
|
||||
STAT77 = $213E ; PPU Status Register single read any time
|
||||
STAT78 = $213F ; PPU Status Register single read any time
|
||||
APUIO0 = $2140 ; APU IO Registers single both any time
|
||||
APUIO1 = $2141 ; APU IO Registers single both any time
|
||||
APUIO2 = $2142 ; APU IO Registers single both any time
|
||||
APUIO3 = $2143 ; APU IO Registers single both any time
|
||||
WMDATA = $2180 ; WRAM Data Register single both any time
|
||||
WMADDL = $2181 ; WRAM Address Registers single write any time
|
||||
WMADDM = $2182 ; WRAM Address Registers single write any time
|
||||
WMADDH = $2183 ; WRAM Address Registers single write any time
|
||||
|
||||
|
||||
; Old Style Joypad Registers
|
||||
|
||||
JOYSER0 = $4016 ; Old Style Joypad Registers single (write) read/write any time that is not auto-joypad
|
||||
JOYSER1 = $4017 ; Old Style Joypad Registers many (read) read any time that is not auto-joypad
|
||||
|
||||
|
||||
; Internal CPU Registers
|
||||
|
||||
NMITIMEN = $4200 ; Interrupt Enable Register single write any time
|
||||
WRIO = $4201 ; IO Port Write Register single write any time
|
||||
WRMPYA = $4202 ; Multiplicand Registers single write any time
|
||||
WRMPYB = $4203 ; Multiplicand Registers single write any time
|
||||
WRDIVL = $4204 ; Divisor & Dividend Registers single write any time
|
||||
WRDIVH = $4205 ; Divisor & Dividend Registers single write any time
|
||||
WRDIVB = $4206 ; Divisor & Dividend Registers single write any time
|
||||
HTIMEL = $4207 ; IRQ Timer Registers (Horizontal - Low) single write any time
|
||||
HTIMEH = $4208 ; IRQ Timer Registers (Horizontal - High) single write any time
|
||||
VTIMEL = $4209 ; IRQ Timer Registers (Vertical - Low) single write any time
|
||||
VTIMEH = $420A ; IRQ Timer Registers (Vertical - High) single write any time
|
||||
MDMAEN = $420B ; DMA Enable Register single write any time
|
||||
HDMAEN = $420C ; HDMA Enable Register single write any time
|
||||
MEMSEL = $420D ; ROM Speed Register single write any time
|
||||
RDNMI = $4210 ; Interrupt Flag Registers single read any time
|
||||
TIMEUP = $4211 ; Interrupt Flag Registers single read any time
|
||||
HVBJOY = $4212 ; PPU Status Register single read any time
|
||||
RDIO = $4213 ; IO Port Read Register single read any time
|
||||
RDDIVL = $4214 ; Multiplication Or Divide Result Registers (Low) single read any time
|
||||
RDDIVH = $4215 ; Multiplication Or Divide Result Registers (High) single read any time
|
||||
RDMPYL = $4216 ; Multiplication Or Divide Result Registers (Low) single read any time
|
||||
RDMPYH = $4217 ; Multiplication Or Divide Result Registers (High) single read any time
|
||||
JOY1L = $4218 ; Controller Port Data Registers (Pad 1 - Low) single read any time that is not auto-joypad
|
||||
JOY1H = $4219 ; Controller Port Data Registers (Pad 1 - High) single read any time that is not auto-joypad
|
||||
JOY2L = $421A ; Controller Port Data Registers (Pad 2 - Low) single read any time that is not auto-joypad
|
||||
JOY2H = $421B ; Controller Port Data Registers (Pad 2 - High) single read any time that is not auto-joypad
|
||||
JOY3L = $421C ; Controller Port Data Registers (Pad 3 - Low) single read any time that is not auto-joypad
|
||||
JOY3H = $421D ; Controller Port Data Registers (Pad 3 - High) single read any time that is not auto-joypad
|
||||
JOY4L = $421E ; Controller Port Data Registers (Pad 4 - Low) single read any time that is not auto-joypad
|
||||
JOY4H = $421F ; Controller Port Data Registers (Pad 4 - High) single read any time that is not auto-joypad
|
||||
|
||||
|
||||
; DMA/HDMA Registers
|
||||
|
||||
DMAP0 = $4300 ; (H)DMA Control Register
|
||||
BBAD0 = $4301 ; (H)DMA Destination Register
|
||||
A1T0L = $4302 ; (H)DMA Source Address Registers
|
||||
A1T0H = $4303 ; (H)DMA Source Address Registers
|
||||
A1B0 = $4304 ; (H)DMA Source Address Registers
|
||||
DAS0L = $4305 ; (H)DMA Size Registers (Low)
|
||||
DAS0H = $4306 ; (H)DMA Size Registers (High)
|
||||
DASB0 = $4307 ; HDMA Indirect Address Registers
|
||||
A2A0L = $4308 ; HDMA Mid Frame Table Address Registers (Low)
|
||||
A2A0H = $4309 ; HDMA Mid Frame Table Address Registers (High)
|
||||
NTLR0 = $430A ; HDMA Line Counter Register
|
||||
|
||||
DMAP1 = $4310 ; (H)DMA Control Register
|
||||
BBAD1 = $4311 ; (H)DMA Destination Register
|
||||
A1T1L = $4312 ; (H)DMA Source Address Registers
|
||||
A1T1H = $4313 ; (H)DMA Source Address Registers
|
||||
A1B1 = $4314 ; (H)DMA Source Address Registers
|
||||
DAS1L = $4315 ; (H)DMA Size Registers (Low)
|
||||
DAS1H = $4316 ; (H)DMA Size Registers (High)
|
||||
DASB1 = $4317 ; HDMA Indirect Address Registers
|
||||
A2A1L = $4318 ; HDMA Mid Frame Table Address Registers (Low)
|
||||
A2A1H = $4319 ; HDMA Mid Frame Table Address Registers (High)
|
||||
NTLR1 = $431A ; HDMA Line Counter Register
|
||||
|
||||
DMAP2 = $4320 ; (H)DMA Control Register
|
||||
BBAD2 = $4321 ; (H)DMA Destination Register
|
||||
A1T2L = $4322 ; (H)DMA Source Address Registers
|
||||
A1T2H = $4323 ; (H)DMA Source Address Registers
|
||||
A1B2 = $4324 ; (H)DMA Source Address Registers
|
||||
DAS2L = $4325 ; (H)DMA Size Registers (Low)
|
||||
DAS2H = $4326 ; (H)DMA Size Registers (High)
|
||||
DASB2 = $4327 ; HDMA Indirect Address Registers
|
||||
A2A2L = $4328 ; HDMA Mid Frame Table Address Registers (Low)
|
||||
A2A2H = $4329 ; HDMA Mid Frame Table Address Registers (High)
|
||||
NTLR2 = $432A ; HDMA Line Counter Register
|
||||
|
||||
DMAP3 = $4330 ; (H)DMA Control Register
|
||||
BBAD3 = $4331 ; (H)DMA Destination Register
|
||||
A1T3L = $4332 ; (H)DMA Source Address Registers
|
||||
A1T3H = $4333 ; (H)DMA Source Address Registers
|
||||
A1B3 = $4334 ; (H)DMA Source Address Registers
|
||||
DAS3L = $4335 ; (H)DMA Size Registers (Low)
|
||||
DAS3H = $4336 ; (H)DMA Size Registers (High)
|
||||
DASB3 = $4337 ; HDMA Indirect Address Registers
|
||||
A2A3L = $4338 ; HDMA Mid Frame Table Address Registers (Low)
|
||||
A2A3H = $4339 ; HDMA Mid Frame Table Address Registers (High)
|
||||
NTLR3 = $433A ; HDMA Line Counter Register
|
||||
|
||||
DMAP4 = $4340 ; (H)DMA Control Register
|
||||
BBAD4 = $4341 ; (H)DMA Destination Register
|
||||
A1T4L = $4342 ; (H)DMA Source Address Registers
|
||||
A1T4H = $4343 ; (H)DMA Source Address Registers
|
||||
A1B4 = $4344 ; (H)DMA Source Address Registers
|
||||
DAS4L = $4345 ; (H)DMA Size Registers (Low)
|
||||
DAS4H = $4346 ; (H)DMA Size Registers (High)
|
||||
DASB4 = $4347 ; HDMA Indirect Address Registers
|
||||
A2A4L = $4348 ; HDMA Mid Frame Table Address Registers (Low)
|
||||
A2A4H = $4349 ; HDMA Mid Frame Table Address Registers (High)
|
||||
NTLR4 = $434A ; HDMA Line Counter Register
|
||||
|
||||
DMAP5 = $4350 ; (H)DMA Control Register
|
||||
BBAD5 = $4351 ; (H)DMA Destination Register
|
||||
A1T5L = $4352 ; (H)DMA Source Address Registers
|
||||
A1T5H = $4353 ; (H)DMA Source Address Registers
|
||||
A1B5 = $4354 ; (H)DMA Source Address Registers
|
||||
DAS5L = $4355 ; (H)DMA Size Registers (Low)
|
||||
DAS5H = $4356 ; (H)DMA Size Registers (High)
|
||||
DASB5 = $4357 ; HDMA Indirect Address Registers
|
||||
A2A5L = $4358 ; HDMA Mid Frame Table Address Registers (Low)
|
||||
A2A5H = $4359 ; HDMA Mid Frame Table Address Registers (High)
|
||||
NTLR5 = $435A ; HDMA Line Counter Register
|
||||
|
||||
DMAP6 = $4360 ; (H)DMA Control Register
|
||||
BBAD6 = $4361 ; (H)DMA Destination Register
|
||||
A1T6L = $4362 ; (H)DMA Source Address Registers
|
||||
A1T6H = $4363 ; (H)DMA Source Address Registers
|
||||
A1B6 = $4364 ; (H)DMA Source Address Registers
|
||||
DAS6L = $4365 ; (H)DMA Size Registers (Low)
|
||||
DAS6H = $4366 ; (H)DMA Size Registers (High)
|
||||
DASB6 = $4367 ; HDMA Indirect Address Registers
|
||||
A2A6L = $4368 ; HDMA Mid Frame Table Address Registers (Low)
|
||||
A2A6H = $4369 ; HDMA Mid Frame Table Address Registers (High)
|
||||
NTLR6 = $436A ; HDMA Line Counter Register
|
||||
|
||||
DMAP7 = $4370 ; (H)DMA Control Register
|
||||
BBAD7 = $4371 ; (H)DMA Destination Register
|
||||
A1T7L = $4372 ; (H)DMA Source Address Registers
|
||||
A1T7H = $4373 ; (H)DMA Source Address Registers
|
||||
A1B7 = $4374 ; (H)DMA Source Address Registers
|
||||
DAS7L = $4375 ; (H)DMA Size Registers (Low)
|
||||
DAS7H = $4376 ; (H)DMA Size Registers (High)
|
||||
DASB7 = $4377 ; HDMA Indirect Address Registers
|
||||
A2A7L = $4378 ; HDMA Mid Frame Table Address Registers (Low)
|
||||
A2A7H = $4379 ; HDMA Mid Frame Table Address Registers (High)
|
||||
NTLR7 = $437A ; HDMA Line Counter Register
|
10
justfile
10
justfile
@ -1,16 +1,6 @@
|
||||
default:
|
||||
just --list
|
||||
|
||||
# Run homebrew ROM using mesen-s
|
||||
run-homebrew: homebrew-tutorial
|
||||
mesen-s ./out/main.sfc
|
||||
|
||||
# Build homebrew ROM in ./out
|
||||
homebrew-tutorial:
|
||||
mkdir -p out
|
||||
ca65 ./homebrew-tutorial/main.asm -o ./out/main.o -g
|
||||
ld65 -C ./homebrew-tutorial/lorom.cfg -o ./out/main.sfc ./out/main.o
|
||||
|
||||
greenspace_smc:
|
||||
just legacy/greenspace/greenspace_smc
|
||||
|
||||
|
262
tic_tac.asm
Normal file
262
tic_tac.asm
Normal file
@ -0,0 +1,262 @@
|
||||
.include "header.inc"
|
||||
.include "snes_init.asm"
|
||||
.include "my_custom.asm"
|
||||
|
||||
.BANK 0 SLOT 0
|
||||
.org 0
|
||||
.section "Vblank"
|
||||
|
||||
VBlank:
|
||||
rti
|
||||
|
||||
.ENDS
|
||||
|
||||
.BANK 0 SLOT 0
|
||||
.ORG 0
|
||||
.section "Main"
|
||||
|
||||
Start:
|
||||
Snes_Init
|
||||
|
||||
; 16-bit xy, 8-bit a
|
||||
rep #%00010000
|
||||
sep #%00100000
|
||||
|
||||
; Load palette by writing to $2122
|
||||
; .db $00, $00, $E0, $7F, $1F, $00, $FF, $03
|
||||
|
||||
Load_Palette_Color $00, $00
|
||||
Load_Palette_Color $e0, $7f
|
||||
Load_Palette_Color $1f, $00
|
||||
Load_Palette_Color $ef, $0a
|
||||
|
||||
|
||||
lda #33
|
||||
sta $2121 ; address for CG RAM write
|
||||
lda.l Palette2
|
||||
sta $2122
|
||||
lda.l Palette2 + 1
|
||||
sta $2122
|
||||
|
||||
ldx #UntitledData
|
||||
lda #:UntitledData
|
||||
ldy #(15*16*2)
|
||||
|
||||
;$43X0 is DMA register X, X from 0 to 7
|
||||
stx $4302 ;A address low byte
|
||||
sta $4304 ;A address bank
|
||||
sty $4305 ;number of bytes to transfer
|
||||
|
||||
lda #%00000001 ;set mode transfer words
|
||||
sta $4300
|
||||
|
||||
lda #$18 ; $211[89]: VRAM data write
|
||||
sta $4301 ; set destination
|
||||
|
||||
ldy #$0000
|
||||
sty $2116
|
||||
|
||||
lda #%00000001
|
||||
sta $420b ;start DMA
|
||||
|
||||
|
||||
; write to BG1
|
||||
|
||||
lda #%10000000 ; VRAM writing mode
|
||||
sta $2115
|
||||
|
||||
ldx #$5000
|
||||
stx $2116 ; write to VRAM
|
||||
|
||||
;ugly code starts here - it writes the # shape I mentioned before.
|
||||
.rept 2
|
||||
;X|X|X
|
||||
.rept 2
|
||||
ldx #$0000 ; tile 0 ( )
|
||||
stx $2118
|
||||
ldx #$0002 ; tile 2 (|)
|
||||
stx $2118
|
||||
.endr
|
||||
ldx #$0000
|
||||
stx $2118
|
||||
;first line finished, add BG's
|
||||
.rept 27
|
||||
stx $2118 ; X=0
|
||||
.endr
|
||||
;beginning of 2nd line
|
||||
;-+-+-
|
||||
.rept 2
|
||||
ldx #$0004 ; tile 4 (-)
|
||||
stx $2118
|
||||
ldx #$0006 ; tile 6 (+)
|
||||
stx $2118
|
||||
.endr
|
||||
ldx #$0004 ; tile 4 (-)
|
||||
stx $2118
|
||||
ldx #$0000
|
||||
.rept 27
|
||||
stx $2118
|
||||
.endr
|
||||
.endr
|
||||
.rept 2
|
||||
ldx #$0000 ; tile 0 ( )
|
||||
stx $2118
|
||||
ldx #$0002 ; tile 2 (|)
|
||||
stx $2118
|
||||
.endr
|
||||
|
||||
|
||||
|
||||
; BG2 starts at $6000
|
||||
ldx #$6000
|
||||
stx $2116
|
||||
|
||||
ldx #$000c ;and contains one tile
|
||||
stx $2118 ;data for VRAM write register
|
||||
|
||||
|
||||
|
||||
|
||||
; set up the screen
|
||||
|
||||
lda #%00110000 ; 16x16 tiles, mode 0
|
||||
sta $2105 ; $2105 is the mode for bg mode + tile size
|
||||
|
||||
lda #$50 ; data starts from $4000
|
||||
sta $2107 ; for bg1 ; $2107 is address of tile map location for BG1
|
||||
; tile map location registers:
|
||||
; %aaaaaass
|
||||
; a's <- tile map address location, << 11
|
||||
; ss <- 32x32, 32x64, 32x64, 64x64
|
||||
|
||||
lda #60 ; and $6000
|
||||
sta $2108 ; for bg2 ; and $2108 is tile map location for BG2
|
||||
|
||||
stz $210b ; BG1 and BG2 use the $0000 tiles
|
||||
|
||||
lda #%00000011 ; enable bg1 and 2
|
||||
sta $212C
|
||||
|
||||
;The PPU doesn't process the top line, so we scroll down 1 line.
|
||||
rep #$20 ; 16bit a
|
||||
lda #$07FF ; this is -1 for BG1
|
||||
sep #$20 ; 8bit a
|
||||
sta $210E ; BG1 vert scroll
|
||||
xba
|
||||
sta $210E
|
||||
|
||||
rep #$20 ; 16bit a
|
||||
lda #$FFFF ; this is -1 for BG2
|
||||
sep #$20 ; 8bit a
|
||||
sta $2110 ; BG2 vert scroll
|
||||
xba
|
||||
sta $2110
|
||||
|
||||
lda #%00001111 ; enable screen, set brightness to 15
|
||||
sta $2100
|
||||
|
||||
lda #%10000001 ; enable NMI and joypads
|
||||
sta $4200
|
||||
|
||||
mainloop:
|
||||
Spin_Loop $02
|
||||
|
||||
Reset_Palette_Offset
|
||||
|
||||
Load_Palette_Color $00, $00
|
||||
Load_Palette_Color $e0, $7f
|
||||
Load_Palette_Color $1f, $00
|
||||
Load_Palette_Color $ff, $0a
|
||||
|
||||
lda #$00
|
||||
sta $2122
|
||||
lda #$00
|
||||
sta $2122
|
||||
lda #$e0
|
||||
sta $2122
|
||||
lda #$7f
|
||||
sta $2122
|
||||
lda #$1f
|
||||
sta $2122
|
||||
lda #$00
|
||||
sta $2122
|
||||
lda #$ff
|
||||
sta $2122
|
||||
lda #$0a
|
||||
sta $2122
|
||||
|
||||
;change brightness
|
||||
;lda #%00000011
|
||||
;sta $2100
|
||||
|
||||
;lda #%00110000
|
||||
;sta $2105
|
||||
|
||||
Spin_Loop $02
|
||||
|
||||
Reset_Palette_Offset
|
||||
|
||||
Load_Palette_Color $09, $00
|
||||
Load_Palette_Color $e0, $7f
|
||||
Load_Palette_Color $1f, $00
|
||||
Load_Palette_Color $ff, $7f
|
||||
|
||||
;lda #$0f
|
||||
;sta $2100
|
||||
|
||||
;lda #%00000000
|
||||
;sta $2105
|
||||
|
||||
jmp mainloop
|
||||
|
||||
.ENDS
|
||||
|
||||
|
||||
.BANK 1 SLOT 0
|
||||
.org 0
|
||||
.section "TileData"
|
||||
|
||||
UntitledData:
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03
|
||||
.db $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $FF, $FF, $FF
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $FF, $FF, $FF, $FF
|
||||
.db $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $FF, $FF, $FF, $FF
|
||||
.db $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $FF, $FF, $FF, $FF
|
||||
.db $00, $C0, $00, $E0, $00, $70, $00, $38, $00, $1C, $00, $0E, $00, $07, $00, $03
|
||||
.db $00, $03, $00, $07, $00, $0E, $00, $1C, $00, $38, $00, $70, $00, $E0, $00, $C0
|
||||
.db $00, $07, $00, $0F, $00, $18, $00, $30, $00, $60, $00, $C0, $00, $C0, $00, $C0
|
||||
.db $00, $E0, $00, $F0, $00, $18, $00, $0C, $00, $06, $00, $03, $00, $03, $00, $03
|
||||
.db $FC, $00, $F8, $00, $F0, $00, $E0, $00, $C0, $00, $80, $00, $00, $00, $00, $00
|
||||
.db $3F, $00, $1F, $00, $0F, $00, $07, $00, $03, $00, $01, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03
|
||||
.db $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0
|
||||
.db $FF, $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FF, $FF, $FF, $FF, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00, $00
|
||||
.db $FF, $FF, $FF, $FF, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03, $03
|
||||
.db $FF, $FF, $FF, $FF, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0, $C0
|
||||
.db $00, $03, $00, $07, $00, $0E, $00, $1C, $00, $38, $00, $70, $00, $E0, $00, $C0
|
||||
.db $00, $C0, $00, $E0, $00, $70, $00, $38, $00, $1C, $00, $0E, $00, $07, $00, $03
|
||||
.db $00, $C0, $00, $C0, $00, $C0, $00, $60, $00, $30, $00, $18, $00, $0F, $00, $07
|
||||
.db $00, $03, $00, $03, $00, $03, $00, $06, $00, $0C, $00, $18, $00, $F0, $00, $E0
|
||||
.db $00, $00, $00, $00, $80, $00, $C0, $00, $E0, $00, $F0, $00, $F8, $00, $FC, $00
|
||||
.db $00, $00, $00, $00, $01, $00, $03, $00, $07, $00, $0F, $00, $1F, $00, $3F, $00
|
||||
|
||||
UntitledPalette:
|
||||
;color schema here is %0RRRRRBB BBBGGGGG
|
||||
; final 2 bytes seem to be grid
|
||||
;.db %00000000, %00000000, %11100000, %01111111, %00011111, %00000000, %00000011 %11111111
|
||||
.db $00, $00, $E0, $7F, $1F, $00, $FF, $03
|
||||
Palette2:
|
||||
.db $E0, $7F
|
||||
|
||||
; 30 tiles (2 spaces)
|
||||
; 480 bytes
|
||||
|
||||
.ENDS
|
2
tic_tac.link
Normal file
2
tic_tac.link
Normal file
@ -0,0 +1,2 @@
|
||||
[objects]
|
||||
tic_tac.obj
|
Loading…
Reference in New Issue
Block a user